In a semiconductor process, the global planarization for a semiconductor element is more and more important with the continuous decreasing dimension of the semiconductor element. Currently, the most common global planarization method for a surface of a wafer is a chemical mechanical polishing (CMP) process, by which the surface of the wafer is pressed on a polishing pad having polishing materials thereon, and the polishing pad rotates to planarize the surface of the wafer.
When a CMP process is adopted to polish a semiconductor element, the element may be over polished due to an overlong polishing time, which results in overhigh resistance of the metal lines thereon and causes the reducing of the speed of the semiconductor element, and the dielectric layers thereon may also be seriously damaged. On the other hand, if the polishing time is not long enough to completely remove the metals on the dielectric layers, a situation of under polish will be caused and the properties of the semiconductor element will be affected. Accordingly, a control of the thickness of the element to be polished in a CMP process could avoid the mentioned over polish or under polish situation, and then the yield of the products could be raised.
Please refer to FIG. 1, which is a flow chart illustrating a conventional method of controlling the thickness of the element to be polished in a CMP process. In the conventional CMP process, a feedback control is utilized to adjust the polishing time of the wafers. Firstly, two or three wafers in a first lot are sampled for measuring the thickness thereof and performing a polishing test (step 10). The best polishing time for the first lot of wafers is estimated based on the measured and tested results (step 11). The first lot of wafers is polished over the estimated best polishing time (step 12). After the step 12, the polished wafers are sampled for measuring the thickness thereof (step 13), and the measured results are fed back to the next lot of wafers for estimating the best polishing time of the next lot of wafers (step 14).
Accordingly, in the conventional CMP process, the polishing parameters such as the polishing time of a first lot of wafers are estimated by only sampling some wafers in the first lot, which results in high yield loss. Furthermore, the production cost is high when the feedback control system is adopted to estimate the polishing time of the next lot of wafers. Moreover, the thickness to be polished of each wafer cannot be precisely controlled by merely providing the same estimated polishing time for all of the wafers in one lot. Therefore, the failure rate cannot be significantly reduced in the conventional CMP process.
For overcoming the drawbacks in the prior art, a chemical mechanical polishing method and a system thereof are provided to increase the efficiency, accuracy and stability of the CMP process.